- Page 1: Introduction
- Page 2: Transistor design
- Page 3: Photography
- Page 4: Architectural design
- Page 5: Wrap up
Fundamentally, all of our devices work because of transistors – an electronic switch that doesn’t have any physical moving parts – which is a type of solid-state electronic. Here, we’ll be specifically talking about the n-channel field effect transistor, or FET for short, for the sake of simplicity. Ever since transistors were fabricated into chips, it looks pretty much like this:
Everyone used this design for make microchips and everything tiny. The main point here though is the part labelled as “gate”. To simplify things, the gate has to be powered to let electricity flow from the source to drain terminal, turning the device on. However tri-gates are mostly used on processors for now.
When transistors become smaller and smaller, the gate length becomes smaller, and the reliability of these transistors decreases. Simply speaking, its reliability is directly affected by the surface area of the gate and the source-drain channel. This is due to the limitation of what is now dubbed as 2D transistors.
A few years back, Intel touted that they will be using 3D transistors, or tri-gate transistor, for their Ivy Bridge-based processors. It was huge. News were flying out everywhere, and Moore’s law somehow managed to (once again) survive a little longer. To be honest, I was really stoked about the technology too.
3D transistors had some radical changes, including the usage of z-axis, or depth, to fabricate transistors. The name tri-gate is a direct reference into the 3D transistor’s gate covering 3 different surfaces of the source-drain channel. This of course greatly improved the contact surface area between source-drain channel and the gate, which drastically increased reliability too. That said, the fabrication process can now be further improved to tiny 16nm FinFET processes.
Intel’s however was for laptops and desktops at that time, but never at the scale of handheld mobile devices. When HiSilicon says that Kirin 950 can have 40% increase in performance and 60% decrease in power consumption, it is all because of FinFET fabrication technique. From the illustration shown above, tri-gate transistors have a desirable side effect where more transistors can be packed closer together to get a high performance increase, which in a way prolongs the life of Moore’s law. As mentioned before, lower power consumption is due to much lesser leakage current between the source-drain channel, thanks to the triple-contact surface gate.
What’s even better is that HiSilicon Kirin 950 uses ARM Mali T880 GPU, which doubles the performance and GFLOPS each compared to Kirin 930.
On a positive side note, tri-gate transistor means improved battery life, lower TDP (thermal dissipation power), and higher efficiency too, because the gate doesn’t require as much power to turn the transistor on and off.
Now there are many other 3D transistor designs which are currently in the works as of now. They’re generally referred to as “multigate transistors”. You can find out a lot more about these gate designs here. Who knows, maybe tomorrow we’ll have a porous source-drain channel diffused in the gate!