Cadence is moving deeper into its long-standing relationship with Intel Foundry to push the latter’s 14A process into the next phase through Design Technology Co-Optimization (DTCO).
DTCO revolves around both tech big names, where manufacturing process development and chip design tools are developed in tandem to squeeze out better performance, lower power consumption, and improved silicon area efficiency from early-stage design all the way to production readiness.
Cadence’s AI-driven electronic design automation (EDA) stack and Intel’s advanced process and packaging technologies will be tightly integrated more than ever, but this is not just for incremental optimization, but a more predictive and automated design flow that allows engineers to identify bottlenecks earlier, reduce design iterations, and accelerate time-to-market for high-performance computing and mobile applications built on Intel 14A.
Production-ready Process Design Kits (PDKs) enable chip designers to fully utilize a new manufacturing node and reduce friction in adoption, which leads to customers capable of building reliable and scalable designs on Intel’s next-generation process.
Cadence CEO Anirudh Devgan expressed the new collaboration as a way to unlock new levels of performance and efficiency, while Intel Foundry’s Naga Chandrasekaran emphasized the importance of ecosystem-driven innovation to meet customer demands at scale.
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